The precision tax in atomistics: FP32-on-Tensor-Cores, not one-pass low precision

Machine-learning interatomic potentials (MLIPs) predict energies and forces so molecular dynamics can reach sizes and timescales beyond routine quantum chemistry. Forces are energy gradients; small errors accumulate, which is why many MLIPs stay on FP32 even though Tensor Cores prefer lower precision.

NVIDIA’s 29 October 2026 technical blog, with Lab COSMO, wires Tensor Core FP32 methods — decompose FP32 operands, multiply on Tensor Cores, accumulate in FP32 — into the Point Edge Transformer. The claim: for trajectory-sensitive MLIPs, use FP32-emulation paths (BF16x9 / TF32x3), not one-pass TF32/BF16 that buy speed with energy drift and failed relaxations.

On Blackwell, cuBLAS BF16x9 splits each FP32 into three BF16 components and recombines nine scaled products — enableable for compatible PyTorch GEMMs via env/math mode. On Ampere, a custom TF32Linear uses CUTLASS OpMultiplyAddFastF32, three cross-products, omitting residual×residual; forward and force backprop use TF32x3, weight grads irrelevant for fixed-weight inference.

Benchmarks use 26M and 255M PET-MAD checkpoints on 192- and 17,280-atom water boxes. Larger systems gain more as non-GEMM work shrinks.

Speed: BF16x9 large GEMMs ~2.2–2.5× on the 17,280-atom case, MD-step ~1.7× in the performant strategy; TF32x3 major linears ~1.7–1.9×, MD-step ~1.5× on the large system. Accuracy narrative: BF16x9 error below the model’s own non-determinism; TF32x3 force error ~3× the FP32-after-recompile delta, far better than one-pass TF32’s trajectory failures.

Physical checks: on a 30 ps NVE water box, FP32 and TF32x3 show comparable bounded energy fluctuations; one-pass TF32 drifts more. FIRE2 relaxation: TF32x3 matches FP32 convergence; one-pass TF32 plateaus ~1.2×10⁻³ eV/Å. That is “optimizer finishes,” not only “single-point energy close.”

Steelman: end-to-end gains track system size and GEMM share; small systems lose speedup to launch and neighbor work. TF32x3 needs shape tuning; BF16x9 needs Blackwell. One model (PET) is not every MLIP. The post did not measure stacking with graph opts, fused kernels, or CUDA Graphs.

Another limit: “below non-determinism” is relative; long phase-transition or hard chemistry cases still need domain validation.

For computational chemistry and materials teams, the piece moves the precision debate from “can we use FP16?” to “which Tensor Core path keeps a smooth, conservative potential.” For CUDA/library owners, BF16x9’s env-var path lowers model-change cost; Ampere shops get a swappable TF32x3 linear story. For reviewers and industrial simulation, relaxation convergence and NVE drift belong on the performance checklist — not ns/day alone.

Watch six months: whether other MLIPs (MACE, NequIP, equivariant stacks) reproduce “emulated FP32 converges, one-pass low-prec fails”; real speedups when BF16x9 stacks with graph capture; and whether TF32x3 still tracks FP32 at tighter force tolerances. If trajectory-level metrics keep favoring emulation, the thesis holds; if only GEMM microbenchmarks look good, rewrite it.